It is accepted that considerable savings in the cost and size of high power special purpose signal processors could be achieved if it were possible to effectively use current highly integrated components such as bit-slice CPUs. The reason for this is that these more highly integrated components are considerably cheaper per gate than the medium and large scale discrete integrated circuit combinations from which special purpose hardware signal processors are usually constructed, even allowing a substantial factor for inefficiency in using those gates. On the other hand, a special purpose signal processor is almost inevitably more efficient in dealing with signal processing problems than a general purpose computer, because the latter incurs speed penalties in the serial nature of its operations and fairly high hardware overheads because of its generality (eg the need to be able to store and load programs).
However, difficulties do arise in the use of highly integrated components such as bit-slice CPU devices in any application where the amount of computing power is substantially more than can be obtained from a single CPU device. The main difficulty is in the definition of an architecture in which a number of such devices can cooperate to produce the necessary computing power without high overheads or complex operating systems. There are also associated practical difficulties of programming a complex multiple processor system and in maintaining the system when constructed.
It is an object of the present invention to provide means whereby at least some of the above-mentioned disadvantages may be overcome or at least substantially reduced.